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<title>Sample Waveforms for pll50.vhd </title>
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<h2><CENTER>Sample behavioral waveforms for design file pll50.vhd </CENTER></h2>
<P>The following waveforms show the behavior of altpll megafunction for the chosen set of parameters in design pll50.vhd. The design pll50.vhd has Cyclone III AUTO pll configured in NORMAL mode The primary clock input to the PLL is INCLK0, with clock period 20000 ps. </P>
<CENTER><img src=pll50_wave0.jpg> </CENTER>
<P><CENTER><FONT size=2>Fig. 1 : Wave showing NORMAL mode operation. </CENTER></P>
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